Synthesizing the Design Containing the Debug Cores - 2021.2 English

In the next step, synthesize the design containing the debug cores by clicking Run Synthesis in the Vivado Design Suite or by running the following Tcl commands:

launch_runs synth_1
wait_on_run synth_1

You can also use the synth_design Tcl command to synthesize the design. Refer to Vivado Design Suite User Guide: Synthesis (UG901) for more details on the various ways you can synthesize your design.