Clocking - 5.2 English

Video Mixer LogiCORE IP Product Guide (PG243)

Document ID
Release Date
5.2 English

The Video Mixer has only one clock domain. All interfaces, that is, controller and target AXI4-Stream video interfaces as well as the AXI4-Lite interface, and also the memory mapped AXI4 interfaces uses the ap_clk pin as its clock source.

Pixel throughput of the Video Mixer core is defined by the product of the clock frequency times the Samples per Clock setting in the Vivado IDE. With a clock frequency of 300 MHz for ap_clk , and a two sample per clock configuration, the Video Mixer is capable of a 600 mega pixel throughput rate, which is sufficient to handle 4K resolutions at 60 Hz.