The Video Mixer in any configuration has AXI4-Stream video input and output interfaces named s_axis_video and m_axis_video , respectively. Per additional streaming layer, there are an additional AXI4-Stream video input named s_axis_video i with i representing the layer number minus 1. All video streaming interfaces follow the interface specification as defined in the AXI4-Stream Video IP and System Design Guide (UG934) [Ref 3] . The video AXI4-Stream interface can be single, dual, quad, or octa pixels per clock and can support 8, 10, 12, or 16 bits per component. The streaming interface configuration (samples per clock and bits per component) is chosen at IP level and applies to all instances of the AXI4-Stream interface.
Table: Dual Pixels Per Clock, 10 Bits Per Component Mapping for RGB through Table: Dual Pixels Per Clock, 10 Bits Per Component Mapping for YUVA 4:4:4 explain the pixel mapping of an AXI4-Stream interface with 2 pixels per clock and 10 bits per component configuration for all supported color formats. Given that the Video Mixer always requires a hardware configuration for at least three component video, the AXI4-Stream Subset Converter is needed to communicate with other IPs of two or one component video interface in YUV 4:2:2, 4:2:0, or Luma Only.
63:60 |
59:50 |
49:40 |
39:30 |
29:20 |
19:10 |
9:0 |
---|---|---|---|---|---|---|
Zero padding |
R1 |
B1 |
G1 |
R0 |
B0 |
G0 |
63:60 |
59:50 |
49:40 |
39:30 |
29:20 |
19:10 |
9:0 |
---|---|---|---|---|---|---|
Zero padding |
V1 |
U1 |
Y1 |
V0 |
U0 |
Y0 |
63:60 |
59:50 |
49:40 |
39:30 |
29:20 |
19:10 |
9:0 |
---|---|---|---|---|---|---|
Zero padding |
Zero padding |
Zero padding |
V0 |
Y1 |
U0 |
Y0 |
79:70 |
69:60 |
59:50 |
49:40 |
39:30 |
29:20 |
19:10 |
9:0 |
---|---|---|---|---|---|---|---|
A1 |
R1 |
B1 |
G1 |
A0 |
R0 |
B0 |
G0 |
79:70 |
69:60 |
59:50 |
49:40 |
39:30 |
29:20 |
19:10 |
9:0 |
---|---|---|---|---|---|---|---|
A1 |
V1 |
U1 |
Y1 |
A0 |
V0 |
U0 |
Y0 |
Table: AXI4-Stream Interface Signals shows the interface signals for input and output AXI4-Stream video streaming interfaces.
Signal Name |
I/O |
Width |
Description |
---|---|---|---|
s_axis_tdata |
I |
floor(((3 (1) × bits_per_component × pixels_per_clock) + 7) / 8) × 8 |
Input Data |
s_axis_tready |
O |
1 |
Input Ready |
s_axis_tvalid |
O |
1 |
Input Valid |
s_axis_tdest |
I |
1 |
Input Data Routing Identifier |
s_axis_tkeep |
I |
(s_axis_video_tdata width) / 8 |
Input byte qualifier that indicates whether the content of the associated byte of TDATA is processed as part of the data stream. |
s_axis_tlast |
I |
1 |
Input End of Line |
s_axis_tstrb |
I |
(s_axis_video_tdata width) / 8 |
Input byte qualifier that indicates whether the content of the associated byte of TDATA is processed as a data byte or a position byte. |
s_axis_tuser |
I |
1 |
Input Start of Frame |
m_axis_tdata |
O |
floor(((3 × bits_per_component × pixels_per_clock) + 7) / 8) × 8 |
Output Data |
m_axis_tdest |
O |
1 |
Output Data Routing Identifier |
m_axis_tid |
O |
1 |
Output Data Stream Identifier |
m_axis_tkeep |
O |
(m_axis_video_tdata width) / 8 |
Output byte qualifier that indicates whether the content of the associated byte of TDATA is processed as part of the data stream. |
m_axis_tlast |
O |
1 |
Output End of Line |
m_axis_tready |
I |
1 |
Output Ready |
m_axis_tstrb |
O |
(m_axis_video_tdata width) / 8 |
Output byte qualifier that indicates whether the content of the associated byte of TDATA is processed as a data byte or a position byte. |
m_axis_tuser |
O |
1 |
Output Start of Frame |
m_axis_tvalid |
O |
1 |
Output Valid |
Notes: 1. For RGBA and YUVA444, the video data consists of 4 components. |
All video streaming interfaces run at the IP core clock speed, ap_clk .