Running the Design on Hardware - Running the Design on Hardware - 6.0 English - PG232

MIPI CSI-2 Receiver Subsystem Product Guide (PG232)

Document ID
PG232
Release Date
2026-07-08
Version
6.0 English
Important: Before running the design on the Hardware, build the project and generate the required bit/elf files. Refer to Implementing the Example Design for more details.
  1. Connect the JTAG cable and USB-UART cable to the board.
  2. Go to the Application Example Design Project directory.
    Example: cd ./<IP instance name>_ex
  3. Launch the Xilinx System Debugger by selecting Start > All Programs > Xilinx Design Tools > Vivado > Vivado Tcl Shell.
  4. Invoke Xilinx System Debugger.
    (xsdb)Vivado% xsdb
  5. Establish connections to debug targets.
    xsdb% connect
  6. List all available JTAG targets
    xsdb% targets
    Note: The target number for the PSU, PL, RPU, and Cortex-R5F might be different. Run the targets and ensure that they are using the correct target number.
  7. Download the bitstream to the FPGA.
    xsdb% fpga -file ./<ip_instance_name>_ex.runs/impl_1/design_1_wrapper.bit
    Note: For Versal AI Edge Series Gen 2, both the boot.pdi and pld.pdi files must be downloaded.
    xsdb% dev p -file ./<ip_instance_name>_ex.runs/impl_1/design_1_wrapper_boot.pdi
    xsdb% dev p -file ./<ip_instance_name>_ex.runs/impl_1/design_1_wrapper_pld.pdi
  8. Set and reset the corresponding target processor.
    xsdb % targets -set -filter {name =~ "Cortex-A53 #0"}/{name =~ "Cortex-A72 #0"}/{name =~ "Cortex-A78 #0"}
    xsdb % rst -processor
  9. Download and start the application:
    xsdb % dow -force
     vitis_workspace>/<platform_project>/zynqmp_fsbl/fsbl_a53.elf
    Note: Skip the preceding step for SP701, SCU200, or VEK280/VCK190/VEK385-based example designs.
    xsdb % dow -force
     <vitis_workspace>/xmipi_example_1/Debug/xmipi_example_1.elf
    For VEK385 - DPHY
    xsdb % dow -force <vitis_workspace>/xmipi_example_1/Debug/xmipi_vek385_dphy_example.elf
    For VEK385 - CPHY
    xsdb % dow -force <vitis_workspace>/xmipi_example_1/Debug/xmipi_vek385_cphy_example.elf

    Run the application using the con command in xsdb prompt.

    Note: The corresponding application files are as follows:
    • For SP701 board-based example designs, xmipi_sp701_1.elf
    • For VEK280 board-based example designs, xmipi_vek280_1.elf
    • For VCK190 board-based example designs, xmipi_vck190_1.elf
    • For SCU200.XP5IO- based example designs, xmipi_scu200_xp5io_example.elf
    • For SCU200.HPIO- based example designs, xmipi_scu200_hpio_example.elf
    • For VEK385_DPHY- based example designs, xmipi_vek385_dphy_example.elf
    • For VEK385_CPHY- based example designs, xmipi_vek385_cphy_example.elf
    Note: Configure the target processor based on the board design:
    • For the SP701/SCU200 board-based example design, set the target processor as MicroBlaze.
    • For the VCK190 board based example design, set the target processor as Cortex-A72.
    • For the VEK385 board based example design, set the target processor as Cortex-A78.
  10. For the ZCU102 board-based example design, to observe the results, start a Hyper Terminal program on the host PC and configure its serial port (Interface 0) to 115200 baud rate with the default configuration. Ensure that the UART cable is connected to the board and the PC. The UART console displays a menu in the console. You are prompted for design related inputs.
    1. Initially, the application asks you if the camera sensor and display panel are connected. Enter either y or n.
      Note: If you enter n, it is assumed that the camera or the DSI panel or both are not available. The system displays the camera sensor as Disconnected, and/or the DSI Display panel as a Disconnected error message on the console.
    2. Under the Main Menu, select the video source, display device, and resolution details.
      • Press s to select the Sensor as video source and show live sensor data capture.
      • Press t to select the Video Test Pattern generator as the video source and shows rainbow pattern on screen.
      • Press h to switch the display to HDMI monitor if not already displayed.
      • Press d to switch the display to DSI panel.
      • Press r to bring up the resolution menu.
        Note: Selecting an invalid option prompts an Unknown option error message on the console. All resolutions support only four lanes. The supported lane and other pipeline configurations are listed under the Current Pipe Configuration section displayed on the console.
  11. For the SP701 board-based example design, to observe the results, start a Hyper Terminal program on the host PC and configure its serial port (Interface 0) to 9600 baud rate with the default configuration. Ensure that the UART cable is connected to the board and the PC. The UART console displays a menu in the console. Under the Main Menu, you are prompted to select the preferred output.
    1. Press 1 to select the display to DSI panel.
    2. Press 2 to switch the display to HDMI monitor.
  12. For the VCK190 board-based example design, to observe the results, start a Hyper Terminal program on the host PC and configure its serial port (Interface 0) to 115200 baud rate with the default configuration. Ensure that the UART cable is connected to the board and the PC. The UART console displays a menu in the console. Under the Main Menu, you are prompted to select the preferred output.

    • 0: (1920x1080p60)
    • 1:(3840x2160p60)
  13. For the VEK385 board-based example design, to observe the results, start a Hyper Terminal program on the host PC and configure its serial port (Interface 0) to 115200 baud rate with the default configuration. Ensure that the UART cable is connected to the board and the PC. The UART console displays a menu in the console. Under the Main Menu, you are prompted to select the preferred output.
    • D-PHY:

    • C-PHY:

    Note: Selecting an invalid option prompts an Unknown option error message on the console. All resolutions support only four lanes. The supported lane and other pipeline configurations are listed under the Current Pipe Configuration section displayed on the console.
  14. For the SCU200 XP5IO/HPIO based example designs, to observe the results, start a Hyper Terminal program on the host PC and configure its serial port (Interface 0) to 115200 baud rate with the default configuration. Ensure that the UART cable is connected to the board and the PC.
  15. The UART console displays a menu in the console. Under the Main Menu, you are prompted to select the preferred output. Press h to select the display to HDMI monitor.