- Open the Vivado Design Suite.
The Vivado IDE Getting Started page contains links to open or create projects and to view documentation.
- In the Getting Started page, click Create Project to start the New Project wizard.
- In the Project Name page, name the new project and enter the project location. Make sure to check the Create project subdirectory option and click Next.
- In the Project Type page, specify the type of project to create as RTL Project, make sure to Uncheck the Do not specify sources at this time option, and click Next.
- In the Add Sources page, click Next.
- In the Add Existing IP (optional) dialog box, click Next.
- In the Add Constraints (optional) dialog box, click Next.
- In the Default Part dialog box, click Boards to specify the board for the target device(ZCU102, SP701, VEK280 and
VCK190 boards are supported). Then click Next.
- Review the New Project Summary page. Verify that the data appears as
expected, per the steps above, and click Finish.
- Click IP Catalog and select MIPI CSI-2
RX Subsystem under Video Connectivity, then double-click on it.
- You can rename the IP component name.Configure the MIPI CSI-2 RX Subsystem
Application Example Design tab to select the ZCU102, SP701, or VCK190 or VEK280
board-based design, then click OK.
The Generate Output Products dialog box appears.
- Click Generate. You can optionally click Skip if you want to skip generating the output products.
- Right-click on the MIPI CSI-2 Rx Subsystem
component under Design source, and click Open IP Example Design.Note: Because this step involves the generation of the complete system including multiple subsystems, it will take some time to completely build the design.
- Choose the target project location, then click OK.
- The overall system IP integrator block diagram of the ZCU102, SP701, or
VCK190 board-based application example design is generated depending on the GUI option
selected. You can choose to Run Synthesis, Implementation, or Generate Bitstream (Generate
Device Image for the VCK190 board).