Transfer Descriptor DA_MSB Word (Destination Address — Offset 14h) - 4.1 English

AXI Central Direct Memory Access LogiCORE IP Product Guide (PG034)

Document ID
PG034
Release Date
2022-05-18
Version
4.1 English

This word provides the MSB 32 bits of the starting address for the data write operations for the associated DMA transfer. This is used only when the address space is greater than 32.

Figure 3-7:      Transfer Descriptor DA_MSB Word

X-Ref Target - Figure 3-7

pg034_td_da_detail_x1329100024.jpg
Table 3-7:      Transfer Descriptor DA_MSB Word Details

Bits

Field Name

Description

31 to 0

DA

Destination Address. This value specifies the MSB 32 bits of the starting write address for DMA data transfers.