Example Design - 4.1 English

AXI Central Direct Memory Access LogiCORE IP Product Guide (PG034)

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4.1 English

This chapter contains information about the example design provided in the Vivado® Design Suite.

The top module instantiates all components of the core and example design that are needed to implement the design in hardware, as shown in the following figure. This includes clock generator (MMCME2), register configuration, data generator, and data checker modules.

Figure 5-1:      Block Diagram of Example Design

X-Ref Target - Figure 5-1