AXI Central Direct Memory Access LogiCORE IP Product Guide (PG034) - 4.1 English - Describes the core as a soft Xilinx Intellectual Property (IP) core for use with the Vivado® Design Suite. It provides high-bandwidth direct memory access (DMA) between a memory-mapped source address and a memory-mapped destination address using the AXI4 protocol. - PG034
- Document ID
- PG034
- Release Date
- 2022-05-18
- Version
- 4.1 English