The example design contains wait timers. A `define SIM_SPEED_UP is available to improve simulation time by speeding up these wait times.SIM_SPEED_UP is only available when running RTL simulation. It is not available when running simulation with post synthesis or post implementation netlist.
VCS
Use the vlogan option: +define+SIM_SPEED_UP.
ModelSim
Use the vlog option: +define+SIM_SPEED_UP.
IES
Use the ncvlog option: +define+SIM_SPEED_UP.
Vivado Simulator
Use the xvlog option: -d SIM_SPEED_UP.
RS-FEC Enabled Configuration Simulation
For faster simulation, apply SIM_SPEED_UP and deselect the Use Precompiled IP simulation libraries checkbox in the Settings window, as shown in the following figures. If this is not done, the simulation can run for a long time, timing out with an error.
