Ports Added
- gtwiz_reset_qpll1lock_in
- gtwiz_reset_qpll1reset_out
- gt_refclk_out
- tx_unfout_*
- stat_rx_valid_ctrl_code_*
- ctl_tx_ptp_1step_enable_*
- ctl_tx_ptp_latency_adjust_*
- ctl_ptp_transpclk_mode_*
- tx_ptp_upd_chksum_in_*
- tx_ptp_tstamp_offset_in_*
- tx_ptp_chksum_offset_in_*
- tx_ptp_rxtstamp_in_*
- ctl_an_fec_25g_baser_request_*
- stat_an_lp_ability_25gbase_cr1_*
- stat_an_rxcdrhold_*
- ctl_fec_enable_error_to_pcs_*
- ctl_rx_rsfec_enable_correction_*
- ctl_rx_rsfec_enable_indication_*
- ctl_rsfec_enable_*
- ctl_rsfec_ieee_error_indication_mode_*
- ctl_rsfec_consortium_25g_*
- stat_rx_rsfec_hi_ser_*
- stat_rx_rsfec_lane_alignment_status_*
- stat_rx_rsfec_corrected_cw_inc_*
- stat_rx_rsfec_uncorrected_cw_inc_*
- stat_rx_rsfec_err_count0_inc_*
- stat_tx_rsfec_lane_alignment_status_*
- gt_drp_done_*
- speed_*
- anlt_done_*
Ports Removed
- stat_rx_framing_err_valid_1_*
- stat_rx_framing_err_1_*
- stat_rx_framing_err_valid_2_*
- stat_rx_framing_err_2_*
- stat_rx_framing_err_valid_3_*
- stat_rx_framing_err_3_*
- stat_rx_vl_demuxed_*
- stat_rx_vl_number_0_*
- stat_rx_vl_number_1_*
- stat_rx_vl_number_2_*
- stat_rx_vl_number_3_*
- stat_rx_synced_*
- stat_rx_synced_err_*
- stat_rx_mf_len_err_*
- stat_rx_mf_repeat_err_*
- stat_rx_mf_err_*
- stat_rx_misaligned_*
- stat_rx_aligned_err_*
- stat_rx_bip_err_0_*
- stat_rx_bip_err_1_*
- stat_rx_bip_err_2_*
- stat_rx_bip_err_3_*
- stat_rx_aligned_*
- stat_rx_status_*
- tx_ptp_pcslane_out_*
- rx_lane_aligner_fill_0_*
- rx_lane_aligner_fill_1_*
- rx_lane_aligner_fill_2_*
- rx_lane_aligner_fill_3_*
- ctl_lt_pseudo_seed1_*
- ctl_lt_k_p1_to_tx1_*
- ctl_lt_k0_to_tx1_*
- ctl_lt_stat_p1_to_tx1_*
- ctl_lt_stat0_to_tx1_*
- ctl_lt_stat_m1_to_tx1_*
- ctl_lt_pseudo_seed2_*
- ctl_lt_k_p1_to_tx2_*
- ctl_lt_k0_to_tx2_*
- ctl_lt_k_m1_to_tx2_*
- ctl_lt_k_m1_to_tx2_*
- ctl_lt_stat0_to_tx2_*
- ctl_lt_stat_m1_to_tx2_*
- ctl_lt_pseudo_seed3_*
- ctl_lt_k_p1_to_tx3_*
- ctl_lt_k0_to_tx3_*
- ctl_lt_k_m1_to_tx3_*
- ctl_lt_stat_p1_to_tx3_*
- Ctl_lt_stat0_to_tx3_*
- ctl_lt_stat_m1_to_tx3_*
- stat_an_start_tx_disable_*
- stat_an_start_an_good_check_*
- stat_lt_k_p1_from_rx1_*
- stat_lt_k0_from_rx1_*
- stat_lt_k_m1_from_rx1_*
- stat_lt_stat_p1_from_rx1_*
- stat_lt_stat0_from_rx1_*
- stat_lt_stat_m1_from_rx1_*
- stat_lt_k_p1_from_rx2_*
- Stat_lt_k0_from_rx2_*
- stat_lt_k_m1_from_rx2_*
- stat_lt_stat_p1_from_rx2_*
- stat_lt_stat0_from_rx2_*
- stat_lt_stat_m1_from_rx2_*
- stat_lt_k_p1_from_rx3_*
- stat_lt_k0_from_rx3_*
- stat_lt_k_m1_from_rx3_*
- stat_lt_stat_p1_from_rx3_*
- stat_lt_stat0_from_rx3_*
- stat_lt_stat_m1_from_rx3_*