Vitis Application Acceleration Development Flow (Kernel Mode) - 2022.2 English

Vitis High-Level Synthesis User Guide (UG1399)

Document ID
UG1399
Release Date
2022-12-07
Version
2022.2 English

Configures the solution to run in support of the Vivado IP generation flow, requiring strict use of pragmas and directives, and exporting the results as Vivado IP. The command to set up the project solution for the Vivado IP flow is:

open_solution -flow_target vivado

The table below shows the original default settings of command options in the Vivado HLS tool, and the new defaults applied in the Vitis HLS tool.

Table 1. Default Control Settings
Default Control Settings Vivado HLS Vitis HLS
config_compile -pipeline_loops 0 64
config_export -vivado_optimization_level 2 0
set_clock_uncertainty 12.5% 27%
config_interface -m_axi_alignment_byte_size N/A 0
config_interface -m_axi_max_widen_bitwidth N/A 0
config_export -vivado_phys_opt place none
config_interface -m_axi_addr64 false true
config_schedule -enable_dsp_full_reg false true
config_rtl -module_auto_prefix false true
interface pragma defaults ip mode ip mode