set_directive_performance - 2022.2 English

Vitis High-Level Synthesis User Guide (UG1399)

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2022.2 English


Note: set_directive_performance applies to loops and loop nests, and requires a known loop tripcount to determine the performance. If your loop has a variable tripcount then you must also specify set_directive_tripcount.

The set_directive_performance lets you specify a high-level constraint (target_ti) defining the number of clock cycles between successive starts of a loop, and lets the tool infer lower-level UNROLL, PIPELINE, ARRAY_PARTITION, and INLINE directives needed to achieve the desired result. The set_directive_performance does not guarantee the specified value will be achieved, and so it is only a target.

Note: set_directive_inline is applied automatically to functions inside any pipelined loop that has II=1 to improve throughput. If you apply the PERFORMANCE directive that infers a pipeline with II=1, it will also trigger the auto-inline optimization. You can disable this for specific functions by using set_directive_inline off.

The target transaction interval (target_ti) specifies a performance target for loops, where a transaction is a complete set of loop iterations (tripcount) and the interval is the time between when the first transaction starts and the second transaction starts.

Target Transaction Interval (target_ti)
Specifies the number of clock cycles from the first transaction of a loop, or nested loop, and the start of the next transaction of the loop. Specified as the cycles needed for the loop to complete all iterations and begin the next transaction.

The transaction interval is the initiation interval (II) of the loop times the number of iterations, or tripcount: target_ti = II * loop tripcount. Conversely, target_ti = FreqHz / Operations per second.

For example, assuming an image processing function that processes a single frame per invocation with a throughput goal of 60 fps, then the target throughput for the function is 60 invocations per second. If the clock frequency is 180 MHz, then target_ti is 180M/60, or 3 million clock cycles per function invocation.

Vitis HLS always tries to achieve the specified performance target in the design. When set_directive_performance is specified, the tool automatically applies pragmas or directives such as PIPELINE, UNROLL, or ARRAY_PARTITION to achieve the target_ti.


Specify the directive for a function, or a labeled loop, or region of code.

set_directive_performance <label> -target_ti=<value>


Specifies a target transaction interval defined as the number of clock cycles for the loop to complete an iteration. The <value> can be specified as an integer, floating point, or constant expression that is resolved by the tool as an integer.
Note: A warning will be returned if truncation occurs.

Example 1

The loop labeled loop_1 is specified to have target transaction interval of 4 clock cycles:

set_directive_performance loop_1-target_ti=4