Step Loads and Slew Rates

When investigating power delivery solutions and sequencing, it is important to consider the slew rates and step loads of your PDN. The voltage slew rate of a power supply is the rate of change of voltage over time (ΔV∕ΔT) when a VRM output is enabled and applied to the load. Voltage slew rates can determine how much voltage overshoot and undershoot is seen at the load and is caused mainly by race conditions in the control circuitry as it tries to reach the target voltage. It is important to compensate for this overshoot and undershoot in any power delivery design to avoid violating the AC/DC specifications of the target device.

Figure 1. Voltage Overshoot and Undershoot Due to Ramping of Voltage

Voltage slew rates can range from the microseconds (µS) to the milliseconds (mS) range in a typical design. See the respective data sheet for voltage timing specifications. Many VRMs incorporate a soft-start feature that allows delaying the ramp up of the output voltage using a capacitor of a value proportional to the delay. This can also be used to sequence or control the timing of the power delivery.

During a transient event, the demand for current at the load rises sharply and the control loop of the VRM needs to respond to the change in voltage caused by the current increase. This results in a voltage droop and a subsequent overshoot until the VRM has enough time to settle the output voltage. The power distribution network has a large impact on a power design's ability to respond to transient increases in current requirements of a load or an adaptive SoC. The following figure outlines the different stages of the PDN that contribute to the transient response. In a large PDN, there are multiple banks of capacitors that help mitigate these effects, such as on-die capacitance, package capacitance, board capacitance, and VRM bulk capacitance.

Figure 2. Typical Power Distribution Network

In the microsecond range, the on-die capacitance uses its charge to maintain the voltage as it is the first to respond to the transient event followed by the package and board capacitance. Due to the instantaneous nature of a transient event, the VRM control circuitry requires more time to respond to the changing current demands and the voltage droop is mitigated by the output capacitance on the VRM.