Method 2: Analog and Digital Power Sequencers

Simplified Power Sequencing (XAPP1375)

Document ID: XAPP1375
Release Date: 2024-08-07
Revision: 1.2 English

Summary
Introduction
Power Sequencing: Definition and Purpose
Sequencing Behaviors
Step Loads and Slew Rates
Relative Sequencing
Power-up Sequencing
Power-down Sequencing
Example Using Versal AI Core Full-power Management Grouping
Power Domains
Voltage Monitoring Using the System Monitor
External Monitoring
Implementation Details
Method 1: Enable, Power Good, and Daisy Chaining
Method 2: Analog and Digital Power Sequencers
Analog Power Sequencing
Digital Power Sequencing
Digital Sequencing with Analog Devices
Digital Sequencing with Renesas Configurable Mixed-signal ICs
Method 3: Sequencing Using Multiplexed I/Os
Power Management Bus and I2C
Method 4: FPGA
Conclusion
References
Revision History
Please Read: Important Legal Notices

Back to home page