Scope Window - 2024.2 English - UG937

Vivado Design Suite Tutorial: Logic Simulation (UG937)
Document ID
UG937
Release Date
2024-12-11
Version
2024.2 English
System Verilog has a building block called interface. It differs in functionality when you compare it with the module.
  1. On the Scope window, click Expand All button .
  2. You can now view the IF and PC interface instances. The IF and PC interface instance icons are different than the module icons.
  3. Right-click IF and select Go to Source Code. It will point to an interface definition.