Further Optimizing the Design After it Meets Constraints - 2024.1 English

Vivado Design Suite User Guide: Power Analysis and Optimization (UG907)

Document ID
UG907
Release Date
2024-05-30
Version
2024.1 English

Typically at this stage in the development process you want to minimize changes to the RTL, board power supply, and cooling parameters, because this involves a lot of verification or PCB respin costs. However, you can experiment with different software options and constraints to optimize your logic and routing resource counts, configuration, and activity. This minimizes dynamic power and reduces static power at the same time. Depending on your design margins a 15% to 20% savings for your core dynamic power is a reasonable expectation, with some designs showing even more power reduction.