reserve - 2024.1 English

Vitis Unified Software Platform Documentation: Embedded Software Development (UG1400)

Document ID
UG1400
Release Date
2024-05-30
Version
2024.1 English

Syntax

  • For Zynq devices and Zynq UltraScale+ MPSoC:
    [reserve = <value>] <filename>
  • For AMD Versal™ adaptive SoC:
    { reserve = <value>, file=<filename> }

Description

This attribute reserves the memory for a particular partition. Even if the partition size is lesser than the reserved memory, the partition length is always the reserved size. If the partition size is greater than the reserved size, then the partition length is the actual size of the partition.

This attribute is useful in cases where you want to update the partitions in a bootimage without changing the corresponding header.

Arguments

Specified partition

Example

  • For Zynq devices and Zynq UltraScale+ MPSoC:
    all:                                                
    {                                                   
         [bootloader] fsbl.elf                          
         [reserve=0x1000] test.bin                      
    }
  • For AMD Versal™ adaptive SoC:
    new_bif:
    {
    	image
    	{
    		{ type = bootimage, file = base.pdi }
    	}
    	image
    	{
    		name = apu_ss, id = 0x1c000000
    		{ reserve = 0x1000, file = data.bin }
    	}
    }
    
Note: *base.pdi is the PDI generated by Vivado.