You can change the buffer parameters of the IP dynamically, and the change is picked up immediately. If you want to change the width, height, stride, or video format, or if you want to restart the entire system, it is recommended that the pipelined AMD IP video cores are disabled or reset from the system output to input, and programmed or enabled from the system output to input.
In the memory based mode, you can flush the pending AXI transactions before resetting the IP. Assert and hold Bit[5] of the control register. Bit[6] asserts when the flush is complete and you can reset the IP. In memory based operations, you can process up to eight (this is configurable and programmable) frames in one batch through the scene change detection algorithm. Following is the driver programming sequence:
- Program the registers as per the number of streams to be processed in a batch.
- Program the required registers per stream (width, height, stride, format, subsampling factor, buffer pointer).
- Subscribe to the
ap_done
interrupt. - Write
ap_start
to the control register, which kicks off the hardware.Note: Do not enable auto restart. - On
ap_done
interrupt (only 1 per batch), read each SAD value per stream from the appropriate register. - Make the final scene change decision per stream (thresholding).
- Go back to step 1.
In stream based operation, the following is the driver programming sequence:
- Program the required registers per stream (width, height, stride, format, subsampling factor).
- Subscribe to the
ap_done
interrupt. - Write
ap_start
to the control register, which kicks off the hardware.Note: Do not enable auto restart. - On
ap_done
interrupt, read sad0 register value. - Make the final scene change decision (thresholding).
- Go back to step 1.