IP Frame Buffer 0 (0x0040) Register - 1.1 English

Video Scene Change Detection LogiCORE IP Product Guide (PG322)

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1.1 English

In the memory based mode, this register specifies the frame buffer address that holds the luma pixel data for the first stream. The address needs to be aligned to the data size of the memory mapped AXI4 interface. For the Video Scene Change Detection IP, the data size of the memory mapped AXI4 interface is 32. This register is not applicable when the IP is working in the stream mode.

If the IP is configured to a 64 bit address width in the IP GUI, the IP internally creates another register in the register space by adding 0x4 to the existing buffer address register offset. For example, Frame buffer 0 register addresses are 0x0040 and 0x0044. Register addresses for all outputs are also calculated in a similar way.