This chapter provides an example design, including the description of important system-level aspects, when designing with the Video Scene Change Detection IP such as:
- Video Scene Change Detection usage with memory mapped AXI4 interface memory buffers.
- Typical usage of the Video Scene Change Detection IP with other cores.
- Configuration of the Video Scene Change Detection IP
by programming the registers.Note: The example design is only available on the AMD ZCU106 evaluation board.
The Video Scene Change Detection IP calculates the sum of absolute differences (SAD) between consecutive video frames received on either the memory or stream interface. You can select the desired interface from the IDE. The IP driver receives the SAD values, then the IP compares these values with the threshold values and notifies you about the scene change. Following are the two types of example design flows:
- Memory based mode example design flow
- The Video Scene Change Detection IP supports eight streams in the memory mode. You need to configure the number of streams, height, width, stride, buffer address, threshold value for SAD, and subsample value in the registers. The final scene change determination happens based on the threshold value you specify. The example application then writes different patterns in the buffer address for scene change detection. The video scene change driver notifies the SAD values with the stream number, in which the scene change occurs with the help of callback functions.
- Stream based mode example design flow
- The Video Scene Change Detection IP supports only one stream in the stream mode. You need to configure the height, width, stride, buffer address, threshold value for SAD, and subsample value in the registers. The final scene change determination happens based on the threshold value you specify. The example application generates different TPG patterns using TPG, and observes the video scene change based on the given threshold value.
The supported platforms are listed in the following table:
Development Boards | Additional Hardware | Processor |
---|---|---|
ZCU106 | N/A | A53 |
VCK190 | N/A | CIPS |
Perform the following steps to open the example project:
- Select the Video Scene Change Detection IP from the AMD Vivado™ IP catalog.
- Double-click the selected IP or right-click the IP and select Customize IP from the menu.
- Configure the build time parameters in the Customize IP window and select OK. The Vivado IDE generates an example design matching the build time configuration.
- In the Generate Output Products window, select Generate or select Skip. If you select Generate, the IP output products are generated after a brief moment.
- Right-click Video Scene Change Detection in the Sources panel, and select Open IP Example Design from the menu.
- In the Open IP Example Design window, select the example project directory, and click OK. The Vivado software then runs automation to generate the example design in the selected directory.
The generated project contains a synthesizable example design. The following figure shows the Sources panel of the example project. The synthesizable example block design, along with the top-level file, resides in the Design Sources catalog.