Accessing 64-bit DDR Memory Location - 1.1 English

Accessing 64-bit DDR Memory Location - 1.1 English - PG322

Video Scene Change Detection LogiCORE IP Product Guide (PG322)

Document ID

PG322

Release Date

2023-11-10

Version

1.1 English

Perform the following steps to access the 64-bit DDR memory location:

Change the IP address width to 64-bit in the IP dialog box.
In the AMD Vivado™ address editor, unmap the HP0_DDR_LOW base name which has 0x0000_0000 offset address with 2 G band.
Auto assign addresses to map DDR_LOW and DDR_HIGH address spaces for 64-bit mode.
Vivado Design Suite gets the DDR_HIGH offset address as 0x0000_0008_0000_0000 with 32 G band. The IP can use any address as a source or destination buffer address.