IP Width 0 (0x0010) Register - 1.1 English

Video Scene Change Detection LogiCORE IP Product Guide (PG322)

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1.1 English

This register allows you to program the width of the first input color image in a batch of up to eight streams for memory based mode. This register is also applicable for the stream based mode which supports only one stream. Supported values are between 64 and the value provided in the Maximum Number of Columns field in the AMD Vivado™ Integrated Design Environment (IDE). To avoid processing errors, you should restrict the values written to this register to the range supported by the core instance.