Revision History - 3.2 English

HDMI 1.4/2.0 Transmitter Subsystem Product Guide (PG235)

Document ID

PG235

Release Date

2023-10-18

Version

3.2 English

The following table shows the revision history for this document.

Section	Revision Summary
10/18/2023 Version 3.2
HDMI Link Output Interface	Updated LINK_DATA out signal port widths, and added note.
Miscellaneous Signals with AXI4-Stream Video Interface	Updated SB_STATUS_IN_tdata width and description.
Miscellaneous Signals with Native Video Interface	Updated SB_STATUS_IN_tdata width and description.
Summary	Added table note.
10/19/2022 Version 3.2
IP Facts	Added Native Video and Native Video DE interfaces support.
AXI4-Stream Video Input Stream Interface	Added YCbCr420 support.
Native Video Input Interface	Added topic.
Native DE Video Input Interface	Added topic.
References	Added reference to DS959.
10/27/2021 Version 3.2
AXI4-Stream Video Input Stream Interface	Updated diagrams.
Device, Package, and Speed Grade Selections	Updated table for AMD Kintex™ UltraScale+™ and Artix UltraScale+ device support.
06/16/2021 Version 3.2
Features	Added support for DDC clock stretching.
Port Descriptions Native Video Pinouts Native Video Interface Interlaced Video Clocking Resets	Updated port names.
User Parameters	Updated default values.
Device, Package, and Speed Grade Selections	Updated HDMI 1.4 support.
Tested Video Resolutions for 3D Video	Added section
12/16/2020 Version 3.1
N/A	Added HDCP 2.3 support
07/14/2020 Version 3.1
N/A	Added support for Versal ACAP devices
07/08/2020 Version 3.1
Features AUX Packets Audio Input Stream Interface Audio Clock Regeneration Interface Audio Data Stream Device, Package, and Speed Grade Selections Running the Reference Design (A53 on Zynq UltraScale+ Devices)	Added 3D Audio Support
11/21/2019 Version 3.1
Example Design	Updated Example Design from SDK to the Vitis software platform.
Native Video (Vectored DE) Native Video/Native Video (Vectored DE) Interface Option	Added support for Vectored DE to the native video interface.
02/12/2019 Version 3.1
N/A	Added HDCP Repeater functionality Added Pass-through + I2S support Added PCB design guidelines for TMDS181 and DP159 Updated Example Design steps
04/04/2018 Version 3.1
N/A	Added new board supports (ZCU104, ZCU106, VCU118). Added new Example design features. Updated Example Design steps. Added Migrating and upgrading section. Added debug information. Updated AXI-Lite CPU clock supports. Updated YUV420 remapping feature illustration.
12/20/2017 Version 3.0
N/A	Updated Example Design steps. Added notes for DP159 Settings. Updated notes for CPU clock requirements.
10/04/2017 Version 3.0
N/A	Added Example design topology supports (TX-Only, Pass-through). Added Example design VPHY Configuration Support (NI-DRU Enable/Disable, TXPLL selection, RXPLL selection). Added Example design new board supports (ZCU102). Added SDK application supports (RX, Pass-through and HDCP key utility) Added Information for Example design description. Added Software Flow diagram. Added Information if not all audio channels are used. Added Information about Native Video. Added Information about Interlaced Video.
04/05/2017 Version 2.0
N/A	Removed single pixel per clock support
11/30/2016 Version 2.0
N/A	Added example design migration notes.
10/05/2016 Version 2.0
N/A	Added example design flow. Added HPD XGUI option. Added software use cases. Updated Xilinx AUTOMOTIVE APPLICATIONS DISCLAIMER.
06/08/2016 Version 2.0
N/A	Updated optional video over AXI4-Stream support.
04/06/2016 Version 2.0
N/A	Added Features section in IP Facts. Updated Unsupported Features in Overview chapter Updated Product Specification chapter. Updated Designing with the Subsystem chapter. Updated Design Flow Steps chapter. Updated Hardware Testing and Video Resolutions sections. Updated Application Software Development appendix.
11/18/2015 Version 1.0
Initial release.	N/A