Report CDC tries to match each CDC path to a known CDC topology. Each CDC topology is associated with one or several CDC rules, as presented in Table 1. Note that you cannot modify the severity of the rules as with DRCs and Messages. Simplified schematics and descriptions of the CDC Topologies being detected are included in Simplified Schematics of the CDC Topologies.
The CDC topologies are analyzed based on some precedence rules. Table 2 shows the CDC rules ordered from the highest to the lowest precedence. By default, only one CDC violation is reported at most per endpoint and if multiple violations exist on a particular endpoint, the CDC rule with the highest precedence is reported and masks any lower precedence CDC violation. For example, since CDC-15 has a higher precedence than CDC-10, a safe CDC-15 detected on a register masks an unsafe CDC-10 on the pin D of the same register.
-all_checks_per_endpoint
This option forces the tool to report all the Info, Warning, and Critical checks that apply on the endpoints, regardless of the rules of precedence. However, unsafe rules on a register are not reported if at least one safe rule on the same register is detected.
| CDC Topology | CDC Rule | Severity | Description |
|---|---|---|---|
| Single-bit CDC | CDC-1 | Critical | A single-bit CDC path is not synchronized or has unknown CDC circuitry. |
| CDC-2 | Warning | A single-bit CDC path is synchronized with a 2+ stage
synchronizer but the ASYNC_REG property
is missing on all or some of the synchronizer flip-flops. |
|
| CDC-3 | Info | A single-bit CDC path is synchronized with a 2+ stage
synchronizer and the ASYNC_REG property
is present. |
|
| Multi-bit CDC | CDC-4 | Critical | A multi-bit bus CDC path is not synchronized or has unknown CDC circuitry. |
| CDC-5 | Warning | A multi-bit bus CDC path is synchronized with a 2+
stage synchronizer but the ASYNC_REG
property is missing on all or some of the synchronizer
flip-flops. |
|
| CDC-6 | Warning | A multi-bit bus CDC path is synchronized with a 2+
stage synchronizer and the ASYNC_REG
property is present. |
|
| Asynchronous Reset | CDC-7 | Critical | An asynchronous signal (clear or preset) is not synchronized or has unknown CDC circuitry. |
| CDC-8 | Warning | An asynchronous signal (clear or preset) is
synchronized but the ASYNC_REG property
is missing on all or some of the synchronizer flip-flops. |
|
| CDC-9 | Info | An asynchronous reset is synchronized and the ASYNC_REG property is present. |
|
| Combinatorial Logic | CDC-10 | Critical | Combinatorial logic has been detected in the fanin of a synchronization circuit. |
| Fanout | CDC-11 | Critical | A fanout has been detected before a synchronization circuit. |
| Multi-Clock Fanin | CDC-12 | Critical | Data from multiple clocks are found in the fanin of a synchronization circuit. |
| non-FD primitive | CDC-13 | Critical | CDC detected on a non-FD primitive. |
| CE-controlled CDC | CDC-15 | Warning | Clock Enable controlled CDC. |
| Mux-controlled CDC | CDC-16 | Warning | Multiplexer controlled CDC. |
| Mux Data Hold CDC | CDC-17 | Warning | Multiplexer data holding CDC. |
HARD_SYNC primitive |
CDC-18 | Info | A signal is synchronized with a HARD_SYNC primitive. |
| LUTRAM-to-FD CDC | CDC-26 | Warning | LUTRAM read/write potential collision. |
| CDC Topology | CDC Rule |
|---|---|
HARD_SYNC primitive |
CDC-18 |
| Non-FD primitive | CDC-13 |
| Mux Data Hold CDC | CDC-17 |
| Mux-controlled CDC | CDC-16 |
| CE-controlled CDC | CDC-15 |
| LUTRAM-to-FD CDC | CDC-26 |
| Asynchronous Reset | CDC-7 |
| Single-bit CDC not synchronized | CDC-1 |
| Multi-bit CDC not synchronized | CDC-4 |
| Multi-Clock Fanin | CDC-12 |
| Combinatorial Logic | CDC-10 |
| Fanout | CDC-11 |
| Asynchronous Reset synchronized with property | CDC-9 |
| Single-bit CDC synchronized with property | CDC-3 |
| Multi-bit CDC synchronized with property | CDC-6 |
| Asynchronous Reset synchronized without property | CDC-8 |
| Single-bit CDC synchronized without property | CDC-2 |
| Multi-bit CDC synchronized without property | CDC-5 |