The tiles of the matrix are color coded. The colors of the matrix are determined by the background color of the graphical editors as defined under Clock Interactions tab. For more information, see this link in the Vivado Design Suite User Guide: Using the Vivado IDE (UG893). To hide the legend, click the ? button on the toolbar on the left of the matrix.
or by selecting the gear on the- No Path (black)
- There are no timing paths that cross from the source clock to the destination clock. In this case, there is no clock interaction and nothing to report.
- Timed (green)
- The source clock and destination clock have a synchronous relationship, and are safely timed together. This state is determined by the timing engine when the two clocks have a common primary clock and a simple period ratio.
- User Ignored Paths (dark blue)
- User-defined false path or clock group constraints cover all
paths crossing from the source clock to the destination clock. When the
interaction report is run for hold analysis only (
-delay_type min
) and the source clock and destination clock are covered with aset_max_delay -datapath_only
constraint, the Clock Pair Classification is reported as ignored (the GUI category is User Ignored Paths) and the Inter-Clock Constraints are reported as Auto Generated False Path due to the implicit false path derived from the max delay datapath only. - Partial False Path (light blue)
- User-defined false path constraints cover some of the timing paths crossing from the source clock to the destination clock where the source clock and destination clock have a synchronous relationship.
- Timed (Unsafe) (red)
- The source clock and destination clock have an asynchronous relationship. In this case, there is no common primary clock or no expandable period. For more information on asynchronous and unexpandable clocks, see this link in the Vivado Design Suite User Guide: Using Constraints (UG903).
- Partial False Path (Unsafe) (orange)
- This category is identical to Timed (Unsafe), except that at least one path from the source clock to the destination clock is ignored due to a false path exception.
- Max Delay Datapath Only (gray)
- A
set_max_delay -datapath_only
constraint covers all paths crossing from the source clock to the destination clockImportant: The color of a cell in the matrix reflects the state of the constraints between clock domains, not the state of the timing paths' worst slack between the domains. A green cell does not indicate that the timing is met, only that all timing paths that cross clock domains are properly timed, and that their clocks have a known phase relationship.