xsi_get_port_number - 2022.2 English

Vivado Design Suite User Guide: Logic Simulation (UG900)

Document ID
Release Date
2022.2 English
XSI_INT32 xsi_get_port_number(xsiHandle design_handle, const char* port_name);
int Xsi::Loader::get_port_number(const char* port_name);

This function returns an integer ID for the requested top-level port of the HDL design. You may subsequently use the ID to specify the port in xsi_get_value and xsi_put_value calls. port_name is the name of the port and is case sensitive for Verilog and case insensitive for VHDL. The function returns -1 if no port of the specified name exists.

Example code:

#include "xsi.h"
#include "xsi_loader.h"
Xsi::Loader loader("xsim.dir/mySnapshot/xsimk.so","librdi_simulator_kernel.so");
int count = loader.get_port_number("count");