The Vivado simulator executable xvhdl
is used to convert a VHDL design unit into parser dump
(.vdb). By default, Vivado simulator uses mixed 93 and 2008 standard (STD) and IEEE packages
to freely allow mixing of 93 and 2008 features. If you want to force only the VHDL-93
standard (STD) and IEEE package, pass -93_mode
to xvhdl.
To compile a file only with VHDL 2008 mode, you need to pass -2008
switch to xvhdl.
For example, to compile a design called top.vhdl in VHDL-2008, following command line can be used:
xvhdl -2008 -work mywork top.vhdl
The Vivado simulator executable xelab
is used to elaborate a design and produce an executable image for simulation.
xelab can do either of the following:
- Elaborate on parser dumps produced by
xvhdl
- Directly use vhdl source files.
No switch is needed to elaborate on parser dumps produced by xvhdl. You can pass -vhdl2008
to xelab to directly use vhdl source files.
Example 1:
xelab top -s mysim; xsim mysim -R
Example 2:
xelab -vhdl2008 top.vhdl top -s mysim; xsim mysim -R
Instead of specifying VHDL files in the command line for xvhdl
and xelab
, a .prj file can be used. If you have two files for a design called top.vhdl (2008 mode) and bot.vhdl (93 mode), you can create a project file named example.prj as follows:
vhdl xil_defaultlib bot.vhdl
|
vhdl2008 xil_defaultlib top.vhdl
|
In the project file, each line starts with the language type of the file, followed by the library name such as xil_defaultlib
and one or more file names with a space separator. For VHDL 93, one should use vhdl
as the language type. For VHDL 2008, use vhdl2008
instead.
A .prj file can be used as shown in the example below:
xelab -prj example.prj xil_defaultlib.top -s mysim; xsim mysim -R
Alternatively, to mix VHDL 93 and VHDL 2008 design units, compile the files separately with a proper language mode specified to xvhdl
. Then, elaborate on top(s) of the design. For example, if we have a VHDL 93 module called bot in file bot.vhdl, and a VHDL-2008 module called top in file top.vhdl, you can compile them as shown in the example below:
xvhdl bot.vhdl
xvhdl -2008 top.vhdl
xelab -debug typical top -s mysim
Once the executable is produced by xelab, you can run the simulation as usual.
Example 1:
xsim mysim -gui
Example 2:
xsim mysim -R