DTG Settings - 2020.2 English

PetaLinux Tools Documentation Reference Guide (UG1144)

Document ID
UG1144
Release Date
2020-11-24
Version
2020.2 English
Figure 1. DTG Settings

Machine Name

For custom boards, do not change the configuration. For Xilinx® evaluation boards, see Table 1.

Kernel Bootargs

The Kernel Bootargs sub-menu allows you to let PetaLinux automatically generate the kernel boot command-line settings in DTS, or pass PetaLinux user defined kernel boot command-line settings. The following are the default bootargs.

Microblaze-full -- console=ttyS0,115200 earlyprintk
Microblaze-lite -- console=ttyUL0,115200 earlyprintk
zynq            -- console=ttyPS0,115200 earlyprintk
zynqmp          -- earlycon clk_ignore_unused root=/dev/ram0 rw

For more information, see kernel documentation.

Device Tree Overlay Configuration for Zynq-7000 Devices and Zynq UltraScale+ MPSoC

Select this option to separate pl from base DTB and build the pl.dtsi to generate pl.dtbo. After creating a PetaLinux project follow the below steps to add overlay support:

  1. Go to cd <proj root directory>.
  2. In the petalinux-config command, select DTG Settings > Device tree overlay.
  3. Run petalinux-build to generate the pl.dtbo in images/linux directory.

FPGA manager overrides all the options. This come into play only when FPGA manager is not selected.

Converting Bitstream from .bit to .bin

  1. Create a bif file with the following content:
    all: 
    {
            [destination_device = pl] <bitstream in .bit> ( Ex: systemdesign_1_wrapper.bit ) 
    }
  2. Run following command:
    bootgen -image bitstream.bif -arch zynqmp -process_bitstream bin
Note: The bit/bin file name should be same as the firmware name specified in pl.dtsi (design_1_wrapper.bit.bin).

Removing PL from the Device Tree

Select this configuration option to skip PL nodes if the user does not depend on the PL IPs. Also, if any PL IP in DTG generates an error then you can simply enable this flag and the DTG will not generate any PL nodes.

  1. Go to cd <proj root directory>.
  2. In the petalinux-config command, select DTG Settings > Remove PL from device tree.
  3. Run petalinux-build.
Note: FPGA manager overrides all these options. This come into play only when FPGA manager is not selected.
Note: If you select both device tree overlay and remove PL from device tree, then base DTB has entry for overlay support but there is no PL DTBO generated.