The Pmod FMC-XM119 board is for accessing Pmod standard devices or general purpose I/O from the base development board. The Pmod standard uses 100 mil space, 25 mil square, and pin header style connectors. The following figure shows a basic block diagram of the main components on the Pmod FMC. The basic function of this board is to provide a Pmod compatible standard connected to the PL I/O of the AMD Versal™ adaptive SoC. For more information, see the Digilent Pmod Interface Specification.
The FMC-XM119 board provides three Pmod 12 pin connectors. There are voltage level translators on the I/O side from the Versal adaptive SoC because of voltage compatibility with the bank fixed voltages. See the Versal Adaptive SoC SelectIO Resources Architecture Manual (AM010) for details on bank voltages.
The voltage translators shown in the figure are the TXS0108E 8-bit bidirectional level shifter voltage translators for open drain and push-pull applications. The input voltage for the I/O to the level translator is controlled from the VADJ, which operates in the range of 1.5V to 3.3V. With the Versal adaptive SoC, the I/O voltage on the XPIO (which is the primary I/O of the FMC) is a maximum of 1.5V, so the default setting for using this FMC Pmod card is VADJ = 1.5V on the XPIO I/O. On the output side of the level translator, this is converted to a 3.3V signal because the Pmod specification is at 3.3V. 5V is also supported per the Pmod specification, but this voltage is not supported without modification to the output power supplies of the level translator, which are fixed at 3.3V for the XM119 FMC board.
