[Figure 1, callout 27]
The VMK180 evaluation board uses power management ICs (PMIC) and power regulators from Infineon (Integrated Circuits) to supply the core and auxiliary voltages listed in the following tables. See schematic 038-05005-01 in XTP620, available from the VMK180 product page.
Schematic Page | Rail Name | Regulator Type | U# | Vout (V) | Iout (A) | I2C Address | INA226 U# | INA226 I2C Address |
---|---|---|---|---|---|---|---|---|
PMBUS1(1), PMBUS2(2) | ||||||||
57 | VCCINT | IR35215 PMIC (6 Phase) | U152 | 0.80 | 190 |
0x16
|
U65 |
0x40 (1) |
VCC_SOC | 0.80 | 18 | U161 |
0x41 (1) |
||||
61 | VCC_PSLP | IRPS5401 (4 Phase + LDO) | U160 | 0.80 | 1 |
0x17
|
U165 |
0x44 (1) |
VCC_PSFP | 0.80 | 2 | U164 |
0x45 (1) |
||||
VCCAUX | 1.5 | 3 | U166 |
0x40 (2) |
||||
VCC_RAM_IO | 0.80 | 4 | U162 |
0x43 (1) |
||||
VCCINT_PMC | 0.80 | 0.5 | U163 |
0x42 (1) |
||||
63 | VCCO_MIO | IRPS5401 (4 Phase + LDO) | U167 | 1.8 | 2 |
0x1C
|
U172 |
0x45 (2) |
VCC3V3 | 3.3 | 0.5 | U174 |
0x47 (2) |
||||
VCC1V8 | 1.8 | 6 | U173 |
0x46 (2) |
||||
VCCAUX_PMC | 1.5 | 0.5 | U168 |
0x41 (2) |
||||
65 | UTIL_1V13 | IRPS5401 (4 Phase + LDO) | U175 | 1.13 | 1 |
0x1D
|
NA | NA |
UTIL_2V5 | 2.5 | 1 | NA | NA | ||||
VCC1V2_DDR4 | 1.2 | 4 | U176 |
0x48 (2) |
||||
VCC1V1_LP4 | 1.1 | 4 | U177 |
0x49 (2) |
||||
MGTYVCCAUX | 1.5 | 0.5 | U234 |
0x4D (2) |
||||
69 | VADJ_FMC | IR38164 | U185 | 1.5 | 10 |
0x1E
|
U184 |
0x4A (2) |
70 | MGTYAVCC | IR38164 | U187 | 0.88 | 6 |
0x1F
|
U186 |
0x4B (2) |
71 | MGTYAVTT | IR38164 | U189 | 1.2 | 10 |
0x20
|
U188 |
0x4C (2) |
The total device power should remain under 125W. To assist the Vivado tools in reporting when power exceeds this amount, add this XDC constraint:
set_operating_conditions
-design_power_budget
125 ;# (125W max power)
Device Rail | Maximum Current (Amps) |
---|---|
VCCINT | 190 |
VCC_SOC + VCC_IO | 18 |
VCC_PSLP | 1 |
VCC_PSFP | 2 |
VCCAUX | 1.5 |
VCC_RAM | 4 |
VCC_PMC | 0.5 |
VCCAUX_PMC | 0.5 |
MGTYVCCAUX | 0.5 |
MGTYAVCC | 6 |
MGTYAVTT | 10 |
VCCO 3.3V | 0.5 |
VCCO 1.5V*(assuming VADJ_FMC programmed to 1.5V) | 10 |
VCCO 1.1V | 4 |
VCCO 1.8V + VCCO_501 + VCCO_502 + VCCO_503 | 2 |
Schematic Page | Rail Name | Regulator Type | U# | Vout (V) | Iout (A) | I2C Address | INA226 U# | INA226 I2C Address |
---|---|---|---|---|---|---|---|---|
72 | DIMM1_VTERM | IR3897 | U80 | 0.6 | 4 | NA | NA | NA |
73 | UTIL_3V3 | IR3889 | U190 | 3.3 | 22 | NA | NA | NA |
74 | UTIL_5V0 | IR3889 | U191 | 5 | 15 | NA | NA | NA |
102 | SYS_VCC0V85 | TPS62480RNCR | U143 | 0.85 | 6 | NA | NA | NA |
103 | SYS_VCC1V8 | TPS62097RWKR | U144 | 1.8 | 2 | NA | NA | NA |
SYS_VCC1V1 | TPS7A8300ARGRR | U145 | 1.1 | 2 | NA | NA | NA | |
SYS_MGTAVCC | TPS62097RWKR | U146 | 0.9 | 2 | NA | NA | NA | |
SYS_VCC1V2 | TPS62097RWKR | U147 | 1.2 | 2 | NA | NA | NA | |
106 | 8A34001_VCC_GPIO_DC | LP38798SD-ADJ/NOPB | U223 | 3.3 | 0.8 | NA | NA | NA |
8A34001_VDDA | LP38798SD-ADJ/NOPB | U225 | 3.3 | 0.8 | NA | NA | NA | |
8A34001_VDDO_Q1_10_7 | LP38798SD-ADJ/NOPB | U226 | 3.3 | 0.8 | NA | NA | NA | |
8A34001_VDD_CLK0 | LP38798SD-ADJ/NOPB | U227 | 3.3 | 0.8 | NA | NA | NA | |
8A34001_VDDO_Q0_9_6 | LP38798SD-ADJ/NOPB | U228 | 3.3 | 0.8 | NA | NA | NA | |
8A34001_VDD_CLK1 | LP38798SD-ADJ/NOPB | U229 | 3.3 | 0.8 | NA | NA | NA | |
8A34001_VDDO_Q2_4_11 | LP38798SD-ADJ/NOPB | U230 | 3.3 | 0.8 | NA | NA | NA | |
8A34001_VDDO_Q8_3_5 | LP38798SD-ADJ/NOPB | U236 | 3.3 | 0.8 | NA | NA | NA | |
107 | 8A34001_VDD_FOD | LP38798SD-ADJ/NOPB | U231 | 1.8 | 0.8 | NA | NA | NA |
8A34001_VDDD | LP38798SD-ADJ/NOPB | U232 | 1.8 | 0.8 | NA | NA | NA |
More information about the power system regulator components can be found at the Infineon Integrated Circuits website.
The FMCP HSPC (J51 and J53) VADJ pins are wired to the programmable rail VADJ_FMC. The VADJ_FMC rail is programmed to 1.50V by default. The VADJ_FMC rail also powers the XCVM1802 FMCP interface banks 706, 707, and 708 (see the table in I/O Voltage Rails). Documentation describing PMBus programming for the Infineon power controllers is available at the Infineon Integrated Circuits website. The PCB layout and power system design meet the recommended criteria described in the Versal Adaptive SoC PCB Design User Guide (UG863).