[Figure 1, callout 11]
Bus I2C1 connects the XCVM1802 U1 PS bank
501, and the XCZU4EG system controller U125 PS bank 501 to two I2C switches (TCA9548A
U35 and U214). These I2C1 connections enable I2C communications with other I2C capable
target devices. TCA9548A U35 is pin-strapped to respond to I2C address 0x74
. TCA9548A U214 is pin-strapped to respond to I2C
address 0x75
. The following figure shows the I2C1 bus
connectivity detailed in the first two tables below. The I2C1 target device I2C
addresses are listed in the third table.
For more information on the TCA9548A and TCA6416A, see the Texas Instruments website.
The detailed Versal adaptive SoC connections for the feature described in this section are documented in the VMK180 board XDC file, referenced in Xilinx Design Constraints.
TCA9548A U35 | Schematic Net Name | Connected To | ||||
---|---|---|---|---|---|---|
Pin Name | Pin No. | Pin No. | Pin Name | Reference Designator | Device | |
SDA | 19 | I2C0_SDA | See the connections shown in the "I2C1 Bus Topology"
figure. TCA9548A U35 Addr. 0x74 |
|||
SCL | 18 | I2C0_SCL | ||||
SD0/SC0 | 4/5 | DC_I2C_SDA/SCL | D25,D24 | D25,D24 | J212 | DC connector |
5,6 | SDA,SCL | U34 | M24128-BR | |||
7,8 | SDA,SCL | U32 | SI570 | |||
SD1/SC1 | 6/7 | FMCP1_IIC_SDA/SCL | C31,C30 | SDA, SCL | J51 | ASP_184329_01 |
SD2/SC2 | 8/9 | FMCP2_IIC_SDA/SCL | C31,C30 | SDA, SCL | J53 | ASP_184329_01 |
SD3/SC3 | 10/11 | DDR4_DIMM1_SDA/SCL | 285,141 | SDA, SCL | J45 | FCI 10124677 |
7,8 | SDA,SCL | U2 | SI570 | |||
SD4/SC4 | 13/14 | LPDDR4_SI570_CLK2_SDA/SCL | 7,8 | SDA,SCL | U3 | SI570 |
SD5/SC5 | 15/16 | LPDDR4_SI570_CLK1_SDA/SCL | 7,8 | SDA, SCL | U4 | SI570 |
SD6/SC6 | 17/18 | HSDP_SI570_SDA/SCL | 7,8 | SDA, SCL | U5 | SI570 |
SD7/SC7 | 19/20 | 8A34001_SDA/SCL | L2,K2 | SDIO, SCLK | U219 | 8A34001 |
3,1&2 | N/A | J310 | 2x9 HDR |
TCA9548A U214 | Schematic Net Name | Connected To | ||||
---|---|---|---|---|---|---|
Pin Name | Pin No. | Pin No. | Pin Name | Reference Designator | Device | |
SDA | 19 | I2C0_SDA | See the
connections shown in the "I2C1 Bus Topology" figure. TCA9548A U214 Addr. 0x75 |
|||
SCL | 18 | I2C0_SCL | ||||
SD1/SC1 | 6/7 | SFP0_IIC_SDA/SCL | T4,T5 | SDA_T4,SCL_T5 | J287(TOP) | 2198318-6 |
SD2/SC2 | 8/9 | SFP1_IIC_SDA/SCL | L4,L5 | SDA_L4,SCL_L5 | J287(BOT) | 2198318-6 |
SD3/SC3 | 10/11 | QSFP1_I2C_SDA/SCL | 12,11 | SDA, SCL | J288 | 1551920-2 |
I2C Devices | I2C Switch Position | I2C Address | Device | |
---|---|---|---|---|
I2C1 Bus | ||||
TCA9548A 8-channel bus switch | N/A |
0b1110100
|
0x74
|
U35 TCA9548A |
Function | Port | Binary Format | Hex Format | |
DC_I2C_SDA/SCL | 0 |
0b1010100
|
0x54
|
DC SE1 on J212 |
0b1000010
|
0x42
|
DC SE2 on J212 | ||
0b1011101
|
0x5D
|
U32 SI570 | ||
FMCP1_IIC_SDA/SCL | 1 |
0bXXXXXXX
|
0x##
|
J51 FMC HSPC |
FMCP2_IIC_SDA/SCL | 2 |
0bXXXXXXX
|
0x##
|
J53 FMC HSPC |
DDR4_DIMM1_SDA/SCL | 3 |
0b1010000
|
0x50
|
J45 FCI socket |
0b1100000
|
0x60
|
U2 SI570 | ||
LPDDR4_SI570_CLK2 | 4 |
0b1100000
|
0x60
|
U3 SI570 |
LPDDR4_SI570_CLK1 | 5 |
0b1100000
|
0x60
|
U4 SI570 |
HSDP_SI570_SDA/SCL | 6 |
0b1011101
|
0x5D
|
U5 SI570 |
8A34001_SDA/SCL | 7 |
0b1011000
|
0x58
|
U219 8A34001 |
N/A | N/A | J310 2x9 HDR. | ||
TCA9548 8-chan. bus switch | N/A |
0b1110101
|
0x75
|
U214 TCA9548A |
SFP0_IIC_SDA/SCL | 0 |
0b1010000
|
0x50
|
J287 (BOT) |
SFP1_IIC_SDA/SCL | 1 |
0b1010000
|
0x50
|
J287 (TOP) |
QSFP1_I2C_SDA/SCL | 2 |
0b1010000
|
0x50
|
J288 |
No connect | 3 - 7 | N/A | N/A | N/A |