Transceivers Bridge - 2024.1 English

Versal Adaptive SoC Design Guide (UG1273)

Document ID
UG1273
Release Date
2024-05-30
Version
2024.1 English

The Versal adaptive SoC transceivers are highly configurable and tightly integrated with the PL block. The Versal adaptive SoC Transceiver Bridge enables Vivado IP integrator-based design entry for GT-based IP. This allows you to generate designs that use multiple quads or designs that share quads with multiple protocol IP. You must use the Vivado Design Suite I/O planning tools to add physical GT locations. For more information, see the Versal Adaptive SoC Transceivers Wizard LogiCORE IP Product Guide (PG331).