Generating the Boot Image in the Design Flows - 2024.1 English

Versal Adaptive SoC Design Guide (UG1273)

Document ID
UG1273
Release Date
2024-05-30
Version
2024.1 English

The Versal adaptive SoC PMC uses a proprietary boot and configuration file format called the programmable device image (PDI) to program and configure the Versal adaptive SoC. The PDI consists of headers, the PLM image, and design data image partitions to be loaded into the Versal adaptive SoC. The PDI also contains configuration data, ELF files, NoC register settings, etc. The PDI image is programmed through the PMC block by the BootROM and PLM. For more information on the PDI file format and generation, see the Bootgen User Guide (UG1283).

Generation of the PDI varies based on your design flow:

Traditional design flow for hardware-only systems
Run the write_device_image command. For more information, see this link in the Vivado Design Suite User Guide: Programming and Debugging (UG908).
Traditional design flow for embedded systems
Run the Bootgen tool. For more information, see this link in the Vitis Unified Software Platform Documentation: Embedded Software Development (UG1400).
Platform-based design flows
Run the v++ --package command. For more information, see this link in the Vitis Unified Software Platform Documentation: Application Acceleration Development (UG1393).
Important: The Vivado tools require the CIPS IP to be present in the design to create the PDI image. For pure RTL designs, access the CIPS IP in the Vivado IP catalog and instantiate the CIPS IP using the default configuration to enable the PDI creation.