AXI Interconnect - 2024.1 English

Versal Adaptive SoC Design Guide (UG1273)

Document ID
UG1273
Release Date
2024-05-30
Version
2024.1 English

The soft IP AXI Interconnect is fully replaced by a combination of the integrated NoC resources and SmartConnect IP. When migrating your design, first consider using NoC resources for all memory access pathways as well as to reduce PL resource utilization and support the high-bandwidth connections. You can then use SmartConnect to accommodate some conversions onto the NoC or to offload traffic from a fully-utilized NoC network. When migrating your design to NoC resources, you must use Vivado IP integrator to instantiate the NoC IP in a block design. For more information, see the Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller LogiCORE IP Product Guide (PG313) and SmartConnect LogiCORE IP Product Guide (PG247).