The DDR memory controller is a high-efficiency, low-latency integrated DDR memory controller for a variety of applications. This includes general purpose central processing units (CPUs) as well as other traditional field programmable gate array (FPGA) applications, such as video or network buffering.
The controller operates at half the DRAM clock frequency and supports DDR4, LPDDR4, and LPDDR4X standards up to 4266 Mb/s. The controller uses a single DDR memory interface supporting data widths of 16, 32, and 64 bits. Enabling error-correction code (ECC) adds eight check bits.
You can also configure the controller as two independent or interleaved DDR interfaces of 16 or 32 data bits each. The controller supports x4, x8, x16 DDR4, and x32 LPDDR4 components. It also supports small outline dual in-line memory modules (SODIMMs), unbuffered DIMMs (UDIMMs), registered DIMMs (RDIMMs), and load-reduced DIMMs (LRDIMMs).
Access the DDR memory controller through the NoC. Use the Versal Adaptive SoC Memory Interface Planning Tutorial available from the AMD GitHub repository to identify the optimal combination of memory interfaces. It covers various width, type, and speed.
In Versal adaptive SoC, the DDR memory controller is a system-wide, shared resource. It is shared between the PS and PL via the device-wide, high-performance NoC interface. You can configure the NoC IP core to include one or more integrated DDR memory controllers. If you select two or four DDR memory controllers, you group them. This forms a single interleaved memory.
In interleaved mode, the application views the participating DDR memory controllers as a single unified block of memory. The NoC supports interleaving across two or four DDR memory controllers. It automatically divides AXI requests into interleaved, block-sized subrequests and alternately sending the subrequests to each of the participating DDR memory controllers.
For information on the DDR memory controller, refer to the Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller LogiCORE IP Product Guide (PG313).