DCMAC - DCMAC - 2026.1 English - UG1273

Versal Adaptive SoC Design Guide (UG1273)

Document ID
UG1273
Release Date
2026-06-24
Version
2026.1 English

The DCMAC subsystem refers to the Versal adaptive SoC 600G Channelized Multirate Ethernet Subsystem. It is a high-performance, adaptable, Ethernet-integrated hard IP that targets numerous customer networking applications. The block configures up to six ports and has independent MAC and PHY functions. These operate at the IEEE Standard MAC Rates from 100GE to 400GE. The overall maximum bandwidth is 600 Gb/s.

The IP supports various FECs and IEEE 1588 Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems (IEEE 1588) hardware timestamping. In addition, the IP can configure to provide 600 Gb/s of MAC processing for up to 40 channels of user-defined bandwidth. For more information, refer to the Versal Adaptive SoC 600G Channelized Multirate Ethernet Subsystem (DCMAC) Product Guide (PG369).