The single-string design is comprised of MicroBlaze with local memory, MDM, AXI Interrupt Controller, AXI Timer, AXI GPIO, and AXI UARTLite.
create_project project_2 project_2 -part xcku040-ffva1156-3-e
create_bd_design benchmark
set mb [create_bd_cell -type ip -vlnv xilinx.com:ip:microblaze microblaze_0]
set_property -dict [list CONFIG.C_USE_BARREL 1 CONFIG.C_USE_HW_MUL 1 \
CONFIG.C_USE_MSR_INSTR 1 CONFIG.C_USE_PCMP_INSTR 1] $mb
apply_bd_automation -rule xilinx.com:bd_rule:microblaze -config \
{local_mem "32KB" debug_module "Debug Only" axi_periph "Enabled" axi_intc "1"
clk "New External Port (100 MHz)"} $mb
set prefix xilinx.com:ip
set tim [create_bd_cell -type ip -vlnv $prefix:axi_timer:2.0 axi_timer_0]
set gpio [create_bd_cell -type ip -vlnv $prefix:axi_gpio:2.0 axi_gpio_0]
set uart [create_bd_cell -type ip -vlnv $prefix:axi_uartlite:2.0 axi_uartlite_0]
set_property -dict [list CONFIG.C_GPIO_WIDTH {4}] $gpio
connect_bd_net [get_bd_pins $gpio/gpio_io_i] [get_bd_pins $gpio/gpio_io_o]
set config {Master "/microblaze_0 (Periph)" intc_ip "/microblaze_0_axi_periph"
Clk_xbar "Auto" Clk_master "Auto" Clk_slave "Auto"}
set rule xilinx.com:bd_rule:axi4
apply_bd_automation -rule $rule -config $config [get_bd_intf_pins $tim/S_AXI]
apply_bd_automation -rule $rule -config $config [get_bd_intf_pins $gpio/S_AXI]
apply_bd_automation -rule $rule -config $config [get_bd_intf_pins $uart/S_AXI]
set xlconcat [get_bd_cells microblaze_0_xlconcat]
connect_bd_net [get_bd_pins $uart/interrupt] [get_bd_pins $xlconcat/In0]
connect_bd_net [get_bd_pins $tim/interrupt] [get_bd_pins $xlconcat/In1]
make_bd_pins_external [get_bd_pins $uart/rx] [get_bd_pins $uart/tx]
make_bd_pins_external [get_bd_pins rst_Clk_100M/ext_reset_in]
group_bd_cells tmr_0 $mb $tim $gpio $uart $xlconcat \
[get_bd_cells microblaze_0_axi_intc] [get_bd_cells microblaze_0_axi_periph] \
[get_bd_cells microblaze_0_local_memory]
regenerate_bd_layout
save_bd_design
Save the Tcl code listed here in a file named benchmark_2.tcl, and then use the following command to recreate the single-string design:
% vivado -source benchmark_2.tcl
Once the single-string design has been created, the TMR Block Automation can be run to triplicate it by using the Tcl code listed for the Typical I/O Module Design .