Comparison Mask Registers (CMR0, CMR1) - 1.0 English

MicroBlaze Triple Modular Redundancy (TMR) Subsystem (PG268)

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These two registers contain individual bits to mask the corresponding Compare input signals during test. CMR0 masks Compare_0 to Compare_31, and CMR1 masks Compare_32 to Compare_63. The register definitions are shown in Table: Comparison Mask Registers (CMR0, CMR1) . The registers are write-only. Issuing a read request generates the read acknowledgment with zero data. The registers are only implemented if C_COMPARATORS_MASK is set to 1, and the available number of bits is determined by C_NO_OF_COMPARATORS. The initial value after reset is determined by C_MASK_RST_VALUE.

Table 2-32: Comparison Mask Registers (CMR0, CMR1)

Comparison Mask