General Design Guidelines - 1.0 English

MicroBlaze Triple Modular Redundancy (TMR) Subsystem (PG268)

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1.0 English

All synchronization has to be made outside the TMR region, because asynchronous interfaces inside the TMR region might result in one cycle of jitter of the synchronized signal.

All IP cores have to have identical configurations to their triplicated counterparts.

MicroBlaze™ Debug is implemented by one of the MicroBlaze processors, with the other two connected as debug slaves.

Recovery requires the complete state of all IP cores to be restored.