This register is used to control comparator fault injection. The register definition is shown in
Table: Comparator Fault Inject Register (CFIR)
and described in
Table: Comparator Fault Inject Register Bit Definitions
. The register is write-only. Issuing a read request generates the read acknowledgment with zero data. The register is only implemented if C_TEST_COMPARATOR is set to 2.
Table 2-43:
Comparator Fault Inject Register (CFIR)
|
IVE
|
IE23
|
IE13
|
IE12
|
31
|
4
|
3
|
2
|
1
|
0
|
Table 2-44:
Comparator Fault Inject Register Bit Definitions
Bits
|
Name
|
Access
|
Reset
Value
|
Description
|
31-4
|
Reserved
|
N/A
|
0
|
Reserved
|
3
|
Inject Voter Error
|
W
|
0
|
Inject a comparison error in the voter checker:
0 = No error.
1 = An error is injected.
|
2
|
Inject Error 2-3
|
W
|
0
|
Inject a comparison error between processor 2 and 3:
0 = No error.
1 = An error is injected.
|
1
|
Inject Error 1-3
|
W
|
0
|
Inject a comparison error between processor 1 and 3:
0 = No error.
1 = An error is injected.
|
0
|
Inject Error 1-2
|
W
|
0
|
Inject a comparison error between processor 1 and 2:
0 = No error.
1 = An error is injected.
|