Break Counter - 1.0 English

MicroBlaze Triple Modular Redundancy (TMR) Subsystem (PG268)

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1.0 English

The break counter is used to generate a Break signal to the processor, signaling that a recovery is necessary due to a fault. The signal can be delayed, to ensure that a complete configuration memory scrubbing cycle has been performed by the SEM core before attempting a recovery. This ensures that any potential configuration memory error has been corrected, to avoid that the same error immediately generates a new fault.