UltraRAM Block - UltraRAM Block - AM007

Versal Adaptive SoC Memory Resources Architecture Manual (AM007)

Document ID
AM007
Release Date
2026-01-07
Revision
1.2 English
  • Asymmetric ports widths are supported by hardware:
    • New aspect ratios have been added in hardware in addition to 4K x 72 (with ECC): 8K x 36, 16K x 18, and 32K x 9.
  • Memory content can be initialized to user-defined values.
  • Data cascade ordering has been added. There are two cascade order attributes to allow for separate control of control signals and data.