Other Exceptions - 2022.1 English

MicroBlaze Processor Embedded Design User Guide (UG1579)

Document ID
Release Date
2022.1 English
  • Enable Illegal Instruction Exception: Causes an exception if the major opcode is invalid.
  • Enable Unaligned Data Exception: When enabled, the tools automatically insert software to handle unaligned accesses.
  • Generated Illegal Instruction Exception for NULL Instructions: MicroBlaze compiler does not generate, nor do Vitis libraries use the NULL instruction code (0x00000000). This code can only exist legally if it is hand-assembled. Executing a NULL instruction normally means that the processor has jumped outside the initialized instruction memory.

    If C_OPCODE_0x0_ILLEGAL is set, MicroBlaze traps this condition; otherwise, it treats the command as a NOP. This setting is only available if you have enabled Illegal Instruction Exception.

  • Enable Stream Exception: Enables stream exception handling for Advanced eXtensible Interface (AXI) read accesses.
    Important: You must enable additional stream instructions to use stream exception handling.
  • Enable Stack Protection: Ensures that memory accesses using the stack pointer (R1) to ensure they are within the limits set by the stack low register (SLR) and stack high register (SHR). If the check fails with exceptions enabled, a stack protection violation exception occurs. The Xilinx System Debugger (XSDB) also reports if the check fails.