Designs with Memory IP and the Clocking Wizard - 2022.1 English

MicroBlaze Processor Embedded Design User Guide (UG1579)

Document ID
UG1579
Release Date
2022-06-01
Version
2022.1 English

For designs that require specific clock frequencies not generated by the Memory IP core, you can instantiate a Clocking Wizard IP and use the ui_clock output of the Memory IP as the clock input for the IP Clocking wizard.

You also need to make the following additional connections:

  1. Connect the onboard reset to the Clocking wizard reset input in addition to the Memory IP.
  2. Connect the mmcm_locked pin of the Memory IP and locked pin of Clocking wizard to the Util_Vector_Logic IP configured to the AND operation. Then, connect the output of the Util_Vector_Logic to the dcm_locked input of Proc_Sys_Reset.