To complete an embedded processor design, you typically perform the following steps:
- Create a new Vivado Design Suite project.
- Create a block design in the IP integrator tool and instantiate a Xilinx processor, along with any other Xilinx IP or your custom IP.
- Generate Output Products of the IP in the block design with the correct synthesis mode option.
- Create a top-level wrapper and instantiate the block design into a top-level RTL design.
- Run the top-level design through synthesis and implementation, and then export the hardware to the Vitis software platform.
- Create your software application. In the Vitis software platform, associate the Executable Linkable File (ELF) file with the hardware design.
- Program into the target board.