If the design requires clocking in addition to the clock generated by the Memory IP core, you need to add a Clocking wizard IP into the block design.
- Select the Add IP command, type Clock into the search field, and select the
Clocking Wizard IP. The following
figure shows a Clock Wizard IP with a Memory IP core within a design.
Follow these steps to connect the Clocking Wizard to the Memory IP core:
- Connect the
ui_clk
orui_addn_clk_0
output of the Memory IP, as well as any other clocks generated, to theclk_in1
input of the Clocking wizard, as shown in the following figure.Tip: Make sure to use the appropriate output clock pin with the desired frequency. - For the UltraScale Memory IP, connect the
c0_ddr4_ui_clk
pin to the Clocking Wizard, as shown in the following figure.
- Connect the
ui_clk_sync_rst
pin of the Memory IP core to thereset
pin of the Clocking wizard, as shown below. - For the UltraScale Memory IP, connect the
c0_ddr4_ui_clk_sync_rst
pin to the Clocking wizard, shown in the following figure.
- Configure the Clocking wizard to generate any required clocks for the design, by double-clicking the IP.