GTH/GTY Receiver Clocking - 2.1 English

UHD-SDI GT LogiCORE IP Product Guide (PG380)

Document ID
PG380
Release Date
2024-06-14
Version
2.1 English

The GTH/GTY receiver reference clock, however, does not need an exact relationship with the bit rate of the incoming SDI signals. This is because the clock and data recovery (CDR) unit in the GTH/GTY receiver can receive bit rates that are up to ±1,250 ppm (≤ 6.6 Gb/s) or ±200 ppm (> 8.0 Gb/s) away from the nominal bit rate as set by the reference clock frequency. This allows the receiver reference clock to be generated by local oscillators that have no exact frequency relationship to the incoming SDI signal. The GTH/GTY receiver generates a recovered clock that is frequency-locked to the incoming SDI bit rate. These clocks are output as rxusrclk , and rxusrclk2 ports of the Receiver User Clocking Network Helper Block from the GTH/GTY Wizard IP and are driven by BUFG_GT. As is described in more detail later, rxusrclk , and rxusrclk2 are true recovered clocks when receiving all SDI line rates except when receiving SD-SDI signals.