Simulating the Performance Traffic Generator - 1.0 English

Versal Adaptive SoC Soft DDR4 SDRAM Memory Controller LogiCORE IP Product Guide (PG353)
Document ID
PG353
Release Date
2023-10-18
Version
1.0 English
After opening the example_design project, follow the steps to run the performance traffic generator.
  1. In the Vivado Design Suite, open the Simulation Sources section and double-click the sim_tb_top.sv file to open it in Edit mode. Or open the file from the following location, <project_dir>/<component_name>_ex/imports/sim_tb_top.sv.
  2. Add a `define BEHV line in the file[sim_tb_to.sv] and save it.
  3. Go to the Simulation Settings in the Vivado IDE.
    1. Select Target Simulator from the supported simulators (supported simulators are ModelSim Simulator, Questa Advanced Simulator, Xcelium Parallel Simulator, Verilog Compiler Simulator (VCS), Riviera-PRO Simulator, and Vivado simulator). Browse to the compiled libraries location and set the path on the Compiled Libraries Location option as per the Target Simulator.
    2. Under the Simulation tab, set the simulation run-time to 1 ms (there are simulation RTL directives which stop the simulation after a certain period of time, which is less than 1 ms). The Generate Scripts Only option generates simulation scripts only.

      To run behavioral simulation, the Generate Scripts Only option must be de-selected.

    3. Click Apply to save these settings.
  4. Click Run Simulations.
  5. Check the transcript for the results.