Report I/O - 2022.1 English

Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906)

Document ID
UG906
Release Date
2022-05-04
Version
2022.1 English

The I/O Report replaces Xilinx® ISE® Design Suite PAD file. The I/O Report lists:

  • Pin Number: All the pins in the device
  • Signal Name: The name of the user I/O assigned to the pin
  • Bank Type: The bank type where the I/O is located (High Range, High Performance, Dedicated, etc.)
  • Pin Name: Name of the pin
  • Use: The I/O usage type (Input, Output, Power/Ground, Unconnected, etc.)
  • I/O Standard: The I/O standard for the User I/O

    An asterisk (*) indicates that it is the default. This differs from the I/O Ports window of the Vivado IDE.

  • I/O Bank Number: The I/O Bank where the pin is located
  • Drive (mA): The drive strength in milliamps
  • Slew Rate: The Slew Rate configuration of the buffer: Fast or Slow
  • Termination: The on/off chip termination settings
  • Voltage: The values for various pins, including VCCO, VCCAUX, and related pins
  • Constraint: Displays Fixed if the pin has been constrained by the user
  • Signal Integrity: The Signal Integrity of the pin