Fabric Clocks sourced from GTs - 2022.1 English

Versal ACAP Hardware, IP, and Platform Development Methodology Guide (UG1387)

Document ID
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2022.1 English

The BUFG_GT/MBUFG_GT buffers can drive any loads in the fabric and include an optional divider you can use to divide the clock from the GT*_QUAD. This eliminates the need to use an extra MMCM/XPLL/DPLL or BUFGCE_DIV to divide the clock.

Clock Regions with GT resources also have direct access to a DPLL resource you can use for frequency synthesis and clock network deskew.